# NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
# RUN: llvm-mc -triple=xtensa -mattr=+bool -disassemble %s | FileCheck -check-prefixes=CHECK-BOOLEAN %s
# RUN: not llvm-mc -triple=xtensa -disassemble %s 2>&1 | FileCheck --implicit-check-not=warning: -check-prefixes=CHECK-CORE %s

## Verify that binary code is correctly disassembled with
## boolean option enabled. Also verify that dissasembling without
## boolean option generates warnings.

[0x10,0x94,0x00]
# CHECK-BOOLEAN: all4	b1, b4
# CHECK-CORE: :[[@LINE-2]]:2: warning: invalid instruction encoding

[0x10,0xb8,0x00]
# CHECK-BOOLEAN: all8	b1, b8
# CHECK-CORE: :[[@LINE-2]]:2: warning: invalid instruction encoding

[0x30,0x12,0x02]
# CHECK-BOOLEAN: andb	b1, b2, b3
# CHECK-CORE: :[[@LINE-2]]:2: warning: invalid instruction encoding

[0x30,0x12,0x12]
# CHECK-BOOLEAN: andbc	b1, b2, b3
# CHECK-CORE: :[[@LINE-2]]:2: warning: invalid instruction encoding

[0x30,0x12,0x22]
# CHECK-BOOLEAN: orb	b1, b2, b3
# CHECK-CORE: :[[@LINE-2]]:2: warning: invalid instruction encoding

[0x30,0x12,0x32]
# CHECK-BOOLEAN: orbc	b1, b2, b3
# CHECK-CORE: :[[@LINE-2]]:2: warning: invalid instruction encoding

[0x30,0x12,0x42]
# CHECK-BOOLEAN: xorb	b1, b2, b3
# CHECK-CORE: :[[@LINE-2]]:2: warning: invalid instruction encoding

[0x10,0x84,0x00]
# CHECK-BOOLEAN: any4	b1, b4
# CHECK-CORE: :[[@LINE-2]]:2: warning: invalid instruction encoding

[0x10,0xa8,0x00]
# CHECK-BOOLEAN: any8	b1, b8
# CHECK-CORE: :[[@LINE-2]]:2: warning: invalid instruction encoding

[0x76,0x11,0x10]
# CHECK-BOOLEAN: bt	b1, . +20
# CHECK-CORE: :[[@LINE-2]]:2: warning: invalid instruction encoding

[0x76,0x00,0x10]
# CHECK-BOOLEAN: bf	b0, . +20
# CHECK-CORE: :[[@LINE-2]]:2: warning: invalid instruction encoding

[0x10,0x23,0xc3]
# CHECK-BOOLEAN: movf	a2, a3, b1
# CHECK-CORE: :[[@LINE-2]]:2: warning: invalid instruction encoding

[0x20,0x34,0xd3]
# CHECK-BOOLEAN: movt	a3, a4, b2
# CHECK-CORE: :[[@LINE-2]]:2: warning: invalid instruction encoding