# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL

## add

# ATT:   {evex}	addb	%r17b, %r16b
# INTEL: {evex}	add	r16b, r17b
0x62,0xec,0x7c,0x08,0x02,0xc1

# ATT:   {evex}	addw	%r17w, %r16w
# INTEL: {evex}	add	r16w, r17w
0x62,0xec,0x7d,0x08,0x03,0xc1

# ATT:   {evex}	addl	%r17d, %r16d
# INTEL: {evex}	add	r16d, r17d
0x62,0xec,0x7c,0x08,0x03,0xc1

# ATT:   {evex}	addq	%r17, %r16
# INTEL: {evex}	add	r16, r17
0x62,0xec,0xfc,0x08,0x03,0xc1

# ATT:   addb	%r17b, %r16b, %r18b
# INTEL: add	r18b, r16b, r17b
0x62,0xec,0x6c,0x10,0x02,0xc1

# ATT:   addw	%r17w, %r16w, %r18w
# INTEL: add	r18w, r16w, r17w
0x62,0xec,0x6d,0x10,0x03,0xc1

# ATT:   addl	%r17d, %r16d, %r18d
# INTEL: add	r18d, r16d, r17d
0x62,0xec,0x6c,0x10,0x03,0xc1

# ATT:   addq	%r17, %r16, %r18
# INTEL: add	r18, r16, r17
0x62,0xec,0xec,0x10,0x03,0xc1

# ATT:   {nf}	addb	%r17b, %r16b
# INTEL: {nf}	add	r16b, r17b
0x62,0xec,0x7c,0x0c,0x02,0xc1

# ATT:   {nf}	addw	%r17w, %r16w
# INTEL: {nf}	add	r16w, r17w
0x62,0xec,0x7d,0x0c,0x03,0xc1

# ATT:   {nf}	addl	%r17d, %r16d
# INTEL: {nf}	add	r16d, r17d
0x62,0xec,0x7c,0x0c,0x03,0xc1

# ATT:   {nf}	addq	%r17, %r16
# INTEL: {nf}	add	r16, r17
0x62,0xec,0xfc,0x0c,0x03,0xc1

# ATT:   {nf}	addb	%r17b, %r16b, %r18b
# INTEL: {nf}	add	r18b, r16b, r17b
0x62,0xec,0x6c,0x14,0x02,0xc1

# ATT:   {nf}	addw	%r17w, %r16w, %r18w
# INTEL: {nf}	add	r18w, r16w, r17w
0x62,0xec,0x6d,0x14,0x03,0xc1

# ATT:   {nf}	addl	%r17d, %r16d, %r18d
# INTEL: {nf}	add	r18d, r16d, r17d
0x62,0xec,0x6c,0x14,0x03,0xc1

# ATT:   {nf}	addq	%r17, %r16, %r18
# INTEL: {nf}	add	r18, r16, r17
0x62,0xec,0xec,0x14,0x03,0xc1

## sub

# ATT:   {evex}	subb	%r17b, %r16b
# INTEL: {evex}	sub	r16b, r17b
0x62,0xec,0x7c,0x08,0x2a,0xc1

# ATT:   {evex}	subw	%r17w, %r16w
# INTEL: {evex}	sub	r16w, r17w
0x62,0xec,0x7d,0x08,0x2b,0xc1

# ATT:   {evex}	subl	%r17d, %r16d
# INTEL: {evex}	sub	r16d, r17d
0x62,0xec,0x7c,0x08,0x2b,0xc1

# ATT:   {evex}	subq	%r17, %r16
# INTEL: {evex}	sub	r16, r17
0x62,0xec,0xfc,0x08,0x2b,0xc1

# ATT:   subb	%r17b, %r16b, %r18b
# INTEL: sub	r18b, r16b, r17b
0x62,0xec,0x6c,0x10,0x2a,0xc1

# ATT:   subw	%r17w, %r16w, %r18w
# INTEL: sub	r18w, r16w, r17w
0x62,0xec,0x6d,0x10,0x2b,0xc1

# ATT:   subl	%r17d, %r16d, %r18d
# INTEL: sub	r18d, r16d, r17d
0x62,0xec,0x6c,0x10,0x2b,0xc1

# ATT:   subq	%r17, %r16, %r18
# INTEL: sub	r18, r16, r17
0x62,0xec,0xec,0x10,0x2b,0xc1

# ATT:   {nf}	subb	%r17b, %r16b
# INTEL: {nf}	sub	r16b, r17b
0x62,0xec,0x7c,0x0c,0x2a,0xc1

# ATT:   {nf}	subw	%r17w, %r16w
# INTEL: {nf}	sub	r16w, r17w
0x62,0xec,0x7d,0x0c,0x2b,0xc1

# ATT:   {nf}	subl	%r17d, %r16d
# INTEL: {nf}	sub	r16d, r17d
0x62,0xec,0x7c,0x0c,0x2b,0xc1

# ATT:   {nf}	subq	%r17, %r16
# INTEL: {nf}	sub	r16, r17
0x62,0xec,0xfc,0x0c,0x2b,0xc1

# ATT:   {nf}	subb	%r17b, %r16b, %r18b
# INTEL: {nf}	sub	r18b, r16b, r17b
0x62,0xec,0x6c,0x14,0x2a,0xc1

# ATT:   {nf}	subw	%r17w, %r16w, %r18w
# INTEL: {nf}	sub	r18w, r16w, r17w
0x62,0xec,0x6d,0x14,0x2b,0xc1

# ATT:   {nf}	subl	%r17d, %r16d, %r18d
# INTEL: {nf}	sub	r18d, r16d, r17d
0x62,0xec,0x6c,0x14,0x2b,0xc1

# ATT:   {nf}	subq	%r17, %r16, %r18
# INTEL: {nf}	sub	r18, r16, r17
0x62,0xec,0xec,0x14,0x2b,0xc1

## and

# ATT:   {evex}	andb	%r17b, %r16b
# INTEL: {evex}	and	r16b, r17b
0x62,0xec,0x7c,0x08,0x22,0xc1

# ATT:   {evex}	andw	%r17w, %r16w
# INTEL: {evex}	and	r16w, r17w
0x62,0xec,0x7d,0x08,0x23,0xc1

# ATT:   {evex}	andl	%r17d, %r16d
# INTEL: {evex}	and	r16d, r17d
0x62,0xec,0x7c,0x08,0x23,0xc1

# ATT:   {evex}	andq	%r17, %r16
# INTEL: {evex}	and	r16, r17
0x62,0xec,0xfc,0x08,0x23,0xc1

# ATT:   andb	%r17b, %r16b, %r18b
# INTEL: and	r18b, r16b, r17b
0x62,0xec,0x6c,0x10,0x22,0xc1

# ATT:   andw	%r17w, %r16w, %r18w
# INTEL: and	r18w, r16w, r17w
0x62,0xec,0x6d,0x10,0x23,0xc1

# ATT:   andl	%r17d, %r16d, %r18d
# INTEL: and	r18d, r16d, r17d
0x62,0xec,0x6c,0x10,0x23,0xc1

# ATT:   andq	%r17, %r16, %r18
# INTEL: and	r18, r16, r17
0x62,0xec,0xec,0x10,0x23,0xc1

# ATT:   {nf}	andb	%r17b, %r16b
# INTEL: {nf}	and	r16b, r17b
0x62,0xec,0x7c,0x0c,0x22,0xc1

# ATT:   {nf}	andw	%r17w, %r16w
# INTEL: {nf}	and	r16w, r17w
0x62,0xec,0x7d,0x0c,0x23,0xc1

# ATT:   {nf}	andl	%r17d, %r16d
# INTEL: {nf}	and	r16d, r17d
0x62,0xec,0x7c,0x0c,0x23,0xc1

# ATT:   {nf}	andq	%r17, %r16
# INTEL: {nf}	and	r16, r17
0x62,0xec,0xfc,0x0c,0x23,0xc1

# ATT:   {nf}	andb	%r17b, %r16b, %r18b
# INTEL: {nf}	and	r18b, r16b, r17b
0x62,0xec,0x6c,0x14,0x22,0xc1

# ATT:   {nf}	andw	%r17w, %r16w, %r18w
# INTEL: {nf}	and	r18w, r16w, r17w
0x62,0xec,0x6d,0x14,0x23,0xc1

# ATT:   {nf}	andl	%r17d, %r16d, %r18d
# INTEL: {nf}	and	r18d, r16d, r17d
0x62,0xec,0x6c,0x14,0x23,0xc1

# ATT:   {nf}	andq	%r17, %r16, %r18
# INTEL: {nf}	and	r18, r16, r17
0x62,0xec,0xec,0x14,0x23,0xc1

## or

# ATT:   {evex}	orb	%r17b, %r16b
# INTEL: {evex}	or	r16b, r17b
0x62,0xec,0x7c,0x08,0x0a,0xc1

# ATT:   {evex}	orw	%r17w, %r16w
# INTEL: {evex}	or	r16w, r17w
0x62,0xec,0x7d,0x08,0x0b,0xc1

# ATT:   {evex}	orl	%r17d, %r16d
# INTEL: {evex}	or	r16d, r17d
0x62,0xec,0x7c,0x08,0x0b,0xc1

# ATT:   {evex}	orq	%r17, %r16
# INTEL: {evex}	or	r16, r17
0x62,0xec,0xfc,0x08,0x0b,0xc1

# ATT:   orb	%r17b, %r16b, %r18b
# INTEL: or	r18b, r16b, r17b
0x62,0xec,0x6c,0x10,0x0a,0xc1

# ATT:   orw	%r17w, %r16w, %r18w
# INTEL: or	r18w, r16w, r17w
0x62,0xec,0x6d,0x10,0x0b,0xc1

# ATT:   orl	%r17d, %r16d, %r18d
# INTEL: or	r18d, r16d, r17d
0x62,0xec,0x6c,0x10,0x0b,0xc1

# ATT:   orq	%r17, %r16, %r18
# INTEL: or	r18, r16, r17
0x62,0xec,0xec,0x10,0x0b,0xc1

# ATT:   {nf}	orb	%r17b, %r16b
# INTEL: {nf}	or	r16b, r17b
0x62,0xec,0x7c,0x0c,0x0a,0xc1

# ATT:   {nf}	orw	%r17w, %r16w
# INTEL: {nf}	or	r16w, r17w
0x62,0xec,0x7d,0x0c,0x0b,0xc1

# ATT:   {nf}	orl	%r17d, %r16d
# INTEL: {nf}	or	r16d, r17d
0x62,0xec,0x7c,0x0c,0x0b,0xc1

# ATT:   {nf}	orq	%r17, %r16
# INTEL: {nf}	or	r16, r17
0x62,0xec,0xfc,0x0c,0x0b,0xc1

# ATT:   {nf}	orb	%r17b, %r16b, %r18b
# INTEL: {nf}	or	r18b, r16b, r17b
0x62,0xec,0x6c,0x14,0x0a,0xc1

# ATT:   {nf}	orw	%r17w, %r16w, %r18w
# INTEL: {nf}	or	r18w, r16w, r17w
0x62,0xec,0x6d,0x14,0x0b,0xc1

# ATT:   {nf}	orl	%r17d, %r16d, %r18d
# INTEL: {nf}	or	r18d, r16d, r17d
0x62,0xec,0x6c,0x14,0x0b,0xc1

# ATT:   {nf}	orq	%r17, %r16, %r18
# INTEL: {nf}	or	r18, r16, r17
0x62,0xec,0xec,0x14,0x0b,0xc1

## xor

# ATT:   {evex}	xorb	%r17b, %r16b
# INTEL: {evex}	xor	r16b, r17b
0x62,0xec,0x7c,0x08,0x32,0xc1

# ATT:   {evex}	xorw	%r17w, %r16w
# INTEL: {evex}	xor	r16w, r17w
0x62,0xec,0x7d,0x08,0x33,0xc1

# ATT:   {evex}	xorl	%r17d, %r16d
# INTEL: {evex}	xor	r16d, r17d
0x62,0xec,0x7c,0x08,0x33,0xc1

# ATT:   {evex}	xorq	%r17, %r16
# INTEL: {evex}	xor	r16, r17
0x62,0xec,0xfc,0x08,0x33,0xc1

# ATT:   xorb	%r17b, %r16b, %r18b
# INTEL: xor	r18b, r16b, r17b
0x62,0xec,0x6c,0x10,0x32,0xc1

# ATT:   xorw	%r17w, %r16w, %r18w
# INTEL: xor	r18w, r16w, r17w
0x62,0xec,0x6d,0x10,0x33,0xc1

# ATT:   xorl	%r17d, %r16d, %r18d
# INTEL: xor	r18d, r16d, r17d
0x62,0xec,0x6c,0x10,0x33,0xc1

# ATT:   xorq	%r17, %r16, %r18
# INTEL: xor	r18, r16, r17
0x62,0xec,0xec,0x10,0x33,0xc1

# ATT:   {nf}	xorb	%r17b, %r16b
# INTEL: {nf}	xor	r16b, r17b
0x62,0xec,0x7c,0x0c,0x32,0xc1

# ATT:   {nf}	xorw	%r17w, %r16w
# INTEL: {nf}	xor	r16w, r17w
0x62,0xec,0x7d,0x0c,0x33,0xc1

# ATT:   {nf}	xorl	%r17d, %r16d
# INTEL: {nf}	xor	r16d, r17d
0x62,0xec,0x7c,0x0c,0x33,0xc1

# ATT:   {nf}	xorq	%r17, %r16
# INTEL: {nf}	xor	r16, r17
0x62,0xec,0xfc,0x0c,0x33,0xc1

# ATT:   {nf}	xorb	%r17b, %r16b, %r18b
# INTEL: {nf}	xor	r18b, r16b, r17b
0x62,0xec,0x6c,0x14,0x32,0xc1

# ATT:   {nf}	xorw	%r17w, %r16w, %r18w
# INTEL: {nf}	xor	r18w, r16w, r17w
0x62,0xec,0x6d,0x14,0x33,0xc1

# ATT:   {nf}	xorl	%r17d, %r16d, %r18d
# INTEL: {nf}	xor	r18d, r16d, r17d
0x62,0xec,0x6c,0x14,0x33,0xc1

# ATT:   {nf}	xorq	%r17, %r16, %r18
# INTEL: {nf}	xor	r18, r16, r17
0x62,0xec,0xec,0x14,0x33,0xc1

## adc

# ATT:   {evex}	adcb	%r17b, %r16b
# INTEL: {evex}	adc	r16b, r17b
0x62,0xec,0x7c,0x08,0x12,0xc1

# ATT:   {evex}	adcw	%r17w, %r16w
# INTEL: {evex}	adc	r16w, r17w
0x62,0xec,0x7d,0x08,0x13,0xc1

# ATT:   {evex}	adcl	%r17d, %r16d
# INTEL: {evex}	adc	r16d, r17d
0x62,0xec,0x7c,0x08,0x13,0xc1

# ATT:   {evex}	adcq	%r17, %r16
# INTEL: {evex}	adc	r16, r17
0x62,0xec,0xfc,0x08,0x13,0xc1

# ATT:   adcb	%r17b, %r16b, %r18b
# INTEL: adc	r18b, r16b, r17b
0x62,0xec,0x6c,0x10,0x12,0xc1

# ATT:   adcw	%r17w, %r16w, %r18w
# INTEL: adc	r18w, r16w, r17w
0x62,0xec,0x6d,0x10,0x13,0xc1

# ATT:   adcl	%r17d, %r16d, %r18d
# INTEL: adc	r18d, r16d, r17d
0x62,0xec,0x6c,0x10,0x13,0xc1

# ATT:   adcq	%r17, %r16, %r18
# INTEL: adc	r18, r16, r17
0x62,0xec,0xec,0x10,0x13,0xc1

## sbb

# ATT:   {evex}	sbbb	%r17b, %r16b
# INTEL: {evex}	sbb	r16b, r17b
0x62,0xec,0x7c,0x08,0x1a,0xc1

# ATT:   {evex}	sbbw	%r17w, %r16w
# INTEL: {evex}	sbb	r16w, r17w
0x62,0xec,0x7d,0x08,0x1b,0xc1

# ATT:   {evex}	sbbl	%r17d, %r16d
# INTEL: {evex}	sbb	r16d, r17d
0x62,0xec,0x7c,0x08,0x1b,0xc1

# ATT:   {evex}	sbbq	%r17, %r16
# INTEL: {evex}	sbb	r16, r17
0x62,0xec,0xfc,0x08,0x1b,0xc1

# ATT:   sbbb	%r17b, %r16b, %r18b
# INTEL: sbb	r18b, r16b, r17b
0x62,0xec,0x6c,0x10,0x1a,0xc1

# ATT:   sbbw	%r17w, %r16w, %r18w
# INTEL: sbb	r18w, r16w, r17w
0x62,0xec,0x6d,0x10,0x1b,0xc1

# ATT:   sbbl	%r17d, %r16d, %r18d
# INTEL: sbb	r18d, r16d, r17d
0x62,0xec,0x6c,0x10,0x1b,0xc1

# ATT:   sbbq	%r17, %r16, %r18
# INTEL: sbb	r18, r16, r17
0x62,0xec,0xec,0x10,0x1b,0xc1