# RUN: llvm-mc -triple=aarch64 -mattr=+all -disassemble %s 2>&1 | FileCheck %s

## aes
# CHECK: aese v0.16b, v1.16b
[0x20,0x48,0x28,0x4e]

## ete
# CHECK: mrs x0, TRCRSR
[0x00,0x0a,0x31,0xd5]

## fp16fml
# CHECK: fmlal v0.2s, v1.2h, v2.2h
[0x20,0xec,0x22,0x0e]

## armv8.2a ras
# CHECK: mrs x0, ERRIDR_EL1
[0x00,0x53,0x38,0xd5]

## armv8.5a mte
# CHECK: irg x0, x1
[0x20,0x10,0xdf,0x9a]

## armv8.5a rand
# CHECK: mrs x0, RNDR
[0x00,0x24,0x3b,0xd5]

## armv8.6a matmul
# CHECK: smmla v1.4s, v16.16b, v31.16b
[0x01,0xa6,0x9f,0x4e]

## armv8.8a-hbc
# CHECK: bc.eq #4
[0x30,0x00,0x00,0x54]

## armv9a rme
# CHECK: mrs x0, MFAR_EL3
[0xa0,0x60,0x3e,0xd5]

## predres (to make sure sysreg aliases work)
# CHECK: cfp rctx, x0
[0x80,0x73,0x0b,0xd5]

## predres2 (sysreg alias implementation is different from predres)
# CHECK: cosp rctx, x0
[0xc0,0x73,0x0b,0xd5]

## sme
# CHECK: addha za0.s, p0/m, p0/m, z0.s
[0x00,0x00,0x90,0xc0]

## smef64
# CHECK: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
[0x00,0x00,0xc0,0x80]

## smei64
# CHECK: addha za0.d, p0/m, p0/m, z0.d
[0x00,0x00,0xd0,0xc0]

## sme2
# CHECK: add { z0.h, z1.h }, { z0.h, z1.h }, z0.h
[0x00,0xa3,0x60,0xc1]