Index of /shared/bigslow/tmp/llvm-project/llvm/lib/Target/RISCV/
../
AsmParser/ 31-Mar-2025 02:07 -
Disassembler/ 31-Mar-2025 02:07 -
GISel/ 31-Mar-2025 02:07 -
MCA/ 31-Mar-2025 02:07 -
MCTargetDesc/ 31-Mar-2025 02:07 -
TargetInfo/ 11-Jan-2024 12:35 -
CMakeLists.txt 31-Mar-2025 02:07 3160
RISCV.h 31-Mar-2025 02:07 4335
RISCV.td 31-Mar-2025 02:07 3372
RISCVAsmPrinter.cpp 31-Mar-2025 02:07 42K
RISCVCallingConv.cpp 31-Mar-2025 02:07 34K
RISCVCallingConv.h 31-Mar-2025 02:07 1767
RISCVCallingConv.td 31-Mar-2025 02:07 2813
RISCVCodeGenPrepare.cpp 31-Mar-2025 02:07 7281
RISCVCombine.td 31-Mar-2025 02:07 1075
RISCVConstantPoolValue.cpp 31-Mar-2025 02:07 2615
RISCVConstantPoolValue.h 31-Mar-2025 02:07 1966
RISCVDeadRegisterDefinitions.cpp 31-Mar-2025 02:07 4449
RISCVExpandAtomicPseudoInsts.cpp 11-Jan-2024 12:35 26K
RISCVExpandPseudoInsts.cpp 31-Mar-2025 02:07 24K
RISCVFeatures.td 31-Mar-2025 02:07 72K
RISCVFoldMemOffset.cpp 31-Mar-2025 02:07 9120
RISCVFrameLowering.cpp 31-Mar-2025 02:07 90K
RISCVFrameLowering.h 31-Mar-2025 02:07 5351
RISCVGISel.td 31-Mar-2025 02:07 8158
RISCVGatherScatterLowering.cpp 31-Mar-2025 02:07 21K
RISCVISelDAGToDAG.cpp 31-Mar-2025 02:07 151K
RISCVISelDAGToDAG.h 31-Mar-2025 02:07 7969
RISCVISelLowering.cpp 31-Mar-2025 02:07 935K
RISCVISelLowering.h 31-Mar-2025 02:07 44K
RISCVIndirectBranchTracking.cpp 31-Mar-2025 02:07 3104
RISCVInsertReadWriteCSR.cpp 31-Mar-2025 02:07 6166
RISCVInsertVSETVLI.cpp 31-Mar-2025 02:07 66K
RISCVInsertWriteVXRM.cpp 31-Mar-2025 02:07 15K
RISCVInstrFormats.td 31-Mar-2025 02:07 20K
RISCVInstrFormatsC.td 31-Mar-2025 02:07 11K
RISCVInstrFormatsV.td 31-Mar-2025 02:07 8675
RISCVInstrGISel.td 31-Mar-2025 02:07 6154
RISCVInstrInfo.cpp 31-Mar-2025 02:07 161K
RISCVInstrInfo.h 31-Mar-2025 02:07 16K
RISCVInstrInfo.td 31-Mar-2025 02:07 87K
RISCVInstrInfoA.td 31-Mar-2025 02:07 19K
RISCVInstrInfoC.td 31-Mar-2025 02:07 42K
RISCVInstrInfoD.td 31-Mar-2025 02:07 28K
RISCVInstrInfoF.td 31-Mar-2025 02:07 35K
RISCVInstrInfoM.td 31-Mar-2025 02:07 5288
RISCVInstrInfoSFB.td 31-Mar-2025 02:07 11K
RISCVInstrInfoV.td 31-Mar-2025 02:07 79K
RISCVInstrInfoVPseudos.td 31-Mar-2025 02:07 316K
RISCVInstrInfoVSDPatterns.td 31-Mar-2025 02:07 75K
RISCVInstrInfoVVLPatterns.td 31-Mar-2025 02:07 155K
RISCVInstrInfoXCV.td 31-Mar-2025 02:07 36K
RISCVInstrInfoXMips.td 31-Mar-2025 02:07 5433
RISCVInstrInfoXRivos.td 31-Mar-2025 02:07 4549
RISCVInstrInfoXSf.td 31-Mar-2025 02:07 35K
RISCVInstrInfoXTHead.td 31-Mar-2025 02:07 35K
RISCVInstrInfoXVentana.td 31-Mar-2025 02:07 2045
RISCVInstrInfoXqccmp.td 31-Mar-2025 02:07 5948
RISCVInstrInfoXqci.td 31-Mar-2025 02:07 35K
RISCVInstrInfoXwch.td 31-Mar-2025 02:07 7510
RISCVInstrInfoZa.td 31-Mar-2025 02:07 11K
RISCVInstrInfoZalasr.td 31-Mar-2025 02:07 4299
RISCVInstrInfoZb.td 31-Mar-2025 02:07 31K
RISCVInstrInfoZc.td 31-Mar-2025 02:07 13K
RISCVInstrInfoZclsd.td 31-Mar-2025 02:07 5251
RISCVInstrInfoZcmop.td 31-Mar-2025 02:07 977
RISCVInstrInfoZfa.td 31-Mar-2025 02:07 12K
RISCVInstrInfoZfbfmin.td 31-Mar-2025 02:07 3090
RISCVInstrInfoZfh.td 31-Mar-2025 02:07 27K
RISCVInstrInfoZicbo.td 31-Mar-2025 02:07 3629
RISCVInstrInfoZicfiss.td 11-Jan-2024 12:35 3045
RISCVInstrInfoZicond.td 31-Mar-2025 02:07 2344
RISCVInstrInfoZilsd.td 31-Mar-2025 02:07 2219
RISCVInstrInfoZimop.td 31-Mar-2025 02:07 3072
RISCVInstrInfoZk.td 31-Mar-2025 02:07 8542
RISCVInstrInfoZvfbf.td 31-Mar-2025 02:07 1492
RISCVInstrInfoZvk.td 31-Mar-2025 02:07 49K
RISCVInstrInfoZvqdotq.td 31-Mar-2025 02:07 1297
RISCVLandingPadSetup.cpp 31-Mar-2025 02:07 2729
RISCVLateBranchOpt.cpp 31-Mar-2025 02:07 3408
RISCVLoadStoreOptimizer.cpp 31-Mar-2025 02:07 14K
RISCVMachineFunctionInfo.cpp 31-Mar-2025 02:07 4888
RISCVMachineFunctionInfo.h 31-Mar-2025 02:07 7089
RISCVMacroFusion.td 31-Mar-2025 02:07 3314
RISCVMakeCompressible.cpp 31-Mar-2025 02:07 16K
RISCVMergeBaseOffset.cpp 31-Mar-2025 02:07 20K
RISCVMoveMerger.cpp 31-Mar-2025 02:07 9373
RISCVOptWInstrs.cpp 31-Mar-2025 02:07 25K
RISCVPfmCounters.td 31-Mar-2025 02:07 708
RISCVPostRAExpandPseudoInsts.cpp 31-Mar-2025 02:07 4330
RISCVProcessors.td 31-Mar-2025 02:07 31K
RISCVProfiles.td 31-Mar-2025 02:07 7993
RISCVPushPopOptimizer.cpp 31-Mar-2025 02:07 6107
RISCVRedundantCopyElimination.cpp 31-Mar-2025 02:07 5873
RISCVRegisterInfo.cpp 31-Mar-2025 02:07 38K
RISCVRegisterInfo.h 31-Mar-2025 02:07 5975
RISCVRegisterInfo.td 31-Mar-2025 02:07 34K
RISCVSchedGenericOOO.td 31-Mar-2025 02:07 17K
RISCVSchedMIPSP8700.td 31-Mar-2025 02:07 9727
RISCVSchedRocket.td 31-Mar-2025 02:07 9195
RISCVSchedSiFive7.td 31-Mar-2025 02:07 60K
RISCVSchedSiFiveP400.td 31-Mar-2025 02:07 52K
RISCVSchedSiFiveP500.td 31-Mar-2025 02:07 12K
RISCVSchedSiFiveP600.td 31-Mar-2025 02:07 61K
RISCVSchedSyntacoreSCR1.td 31-Mar-2025 02:07 4060
RISCVSchedSyntacoreSCR345.td 31-Mar-2025 02:07 14K
RISCVSchedSyntacoreSCR7.td 31-Mar-2025 02:07 13K
RISCVSchedTTAscalonD8.td 31-Mar-2025 02:07 11K
RISCVSchedXiangShanNanHu.td 31-Mar-2025 02:07 9859
RISCVSchedule.td 31-Mar-2025 02:07 17K
RISCVScheduleV.td 31-Mar-2025 02:07 50K
RISCVScheduleXSf.td 31-Mar-2025 02:07 2056
RISCVScheduleZb.td 31-Mar-2025 02:07 4791
RISCVScheduleZvk.td 31-Mar-2025 02:07 6304
RISCVSelectionDAGInfo.cpp 31-Mar-2025 02:07 881
RISCVSelectionDAGInfo.h 31-Mar-2025 02:07 861
RISCVSubtarget.cpp 31-Mar-2025 02:07 9704
RISCVSubtarget.h 31-Mar-2025 02:07 13K
RISCVSystemOperands.td 31-Mar-2025 02:07 17K
RISCVTargetMachine.cpp 31-Mar-2025 02:07 24K
RISCVTargetMachine.h 31-Mar-2025 02:07 2922
RISCVTargetObjectFile.cpp 31-Mar-2025 02:07 7245
RISCVTargetObjectFile.h 31-Mar-2025 02:07 2403
RISCVTargetTransformInfo.cpp 31-Mar-2025 02:07 113K
RISCVTargetTransformInfo.h 31-Mar-2025 02:07 19K
RISCVVLOptimizer.cpp 31-Mar-2025 02:07 45K
RISCVVMV0Elimination.cpp 31-Mar-2025 02:07 6050
RISCVVectorMaskDAGMutation.cpp 31-Mar-2025 02:07 3354
RISCVVectorPeephole.cpp 31-Mar-2025 02:07 25K
RISCVZacasABIFix.cpp 31-Mar-2025 02:07 2950